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Energy-efficient chip technology

A considerable share of the energy needs of present-day microprocessors is used to power the clocking subsystem that synchronizes traffic operations in an orderly manner. A new technology developed at LiU can reduce power consumption by as much as 60 percent.

Chip activities are synchronized by clock signals from an oscillator capable of generating several million oscillations per second. When the clock signal makes a rising transition to initiate activity, the entire clock load is charged from the power supply. When the clock then goes low all this charge is discharged to ground and thereby lost.

”Our solution recovers most of this charge by transferring it to an energy tank, where it is stored until it can be reused again at the next rising clock edge. By doing so less power will be drawn from the power supply compared to a conventional clocking technique leading to large power

savings,” explains Martin Hansson who presented his work in a doctoral thesis on August 29.

The LiU research team fabricated an experimental chip containing innovative on-chip clocking technology, At frequencies of around 1.6 GHz, the chip consumes 60 percent less power than does a conventional system. That implies a reduction in overall consumption of around 15 percent.

"Our team is one of only four or five around the globe who explore this concept. We were pioneers in silicon chip fabrication and testing. Happily, our chip also demonstrates the highest clock frequency," Martin Hansson continues.

He is a postgraduate student at LiUs Division of Electronic Devices, organized within the Department of Electrical Engineering. Division research is focused on high-speed-low-energy integrated circuits.

Martin Hansson spent six months of his doctoral studies in the United States at the Intel research lab in Hillsboro, Oregon.


2008-09-11




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Last updated: 2009-06-03